謝仁偉 (Jen-Wei Hsieh) 　 國立台灣科技大學資訊工程系 辦公室：研究大樓 T4-509 電話：(02) 2737-6462 電子郵件：jenwei@mail.ntust.edu.tw 　 English Version

個人簡介

謝仁偉博士於1999年6月畢業於國立台灣大學資訊工程學系，並分別於2001年6月與2006年6月取得國立台灣大學資訊工程碩士學位（受教於黃肇雄教授）與博士學位（受教於郭大維教授）。謝博士現職為國立台灣科技大學資訊工程系教授，並曾擔任電資學院副院長 (2021/2/1~2023/1/31)，其研究方向主要在於快閃記憶體儲存系統與即時系統。他曾擔任第23屆 IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (IEEE RTCSA 2017) 的議程主席及第11屆 IEEE Non-Volatile Memory Systems and Applications Symposium (IEEE NVMSA 2022) 的大會主席。謝博士目前是電機電子工程師學會 (IEEE) 資深會員、美國計算機協會 (ACM) 會員、ACM SIGAPP會員與台灣電機電子工程學會 (TIEEE) 會員，以及台灣積體電路設計學會 (TICD) 、中華民國資訊學會 (IICM) 與中國電機工程學會 (CIEE)永久會員。

論文與專利

• 國際期刊論文 (通訊作者: *)

  1. Wan-Ling Wu, Jen-Wei Hsieh*, and Hao-Yu Ku, March 2024, "CDS: Coupled Data Storage to Enhance Read Performance of 3D TLC NAND Flash Memory," IEEE Transactions on Computers (TC), Volume 73, Issue 3, pp. 694-707.

  2. David Kuang-Hui Yu and Jen-Wei Hsieh*, September 2022, "Differential Evolution Algorithm with Asymmetric Coding for Solving the Reliability Problem of 3D-TLC CT Flash Memory Storage Systems," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 41, Issue 9, pp.2863-2876.

  3. Jen-Wei Hsieh*, Yueh-Ting Hou, and Tai-Chieh Chang, August 2022, "Alternative Encoding: A Two-Step Transition Reduction Scheme for MLC STT-RAM Cache," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 41, Issue 8, pp.2753-2757.

  4. Tai Chang, Jen-Wei Hsieh*, Tai-Chieh Chang, and Liang-Wei Lai, January 2022, "EMT: Elegantly Measured Tanner for Key-Value Store on SSD," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 41, Issue 1, pp.91-103.

  5. Jen-Wei Hsieh*, Yi-Yu Liu, Hung-Tse Lee, and Tai Chang, September 2021, "TSE: Two-Step Elimination for MLC STT-RAM Last-Level Cache,"  IEEE Transactions on Computers (TC), Volume 70, Issue 9, pp.1498-1510.

  6. David Kuang-Hui Yu and Jen-Wei Hsieh*, April 2020, "A Management Scheme of Multi-Level Retention-Time Queues for Improving the Endurance of Flash-Memory Storage Devices," IEEE Transactions on Computers (TC), Volume 69, Issue 4, pp.549-562.

  7. Han-Yi Lin and Jen-Wei Hsieh*, May 2019, "Revive Bad Flash-Memory Pages by HLC Scheme," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 38, Issue 5, pp.860-873.

  8. Jen-Wei Hsieh*, Chung-Wei Chen, and Han-Yi Lin, December 2015, "Adaptive ECC Scheme for Hybrid SSD's," IEEE Transactions on Computers (TC), Volume 64, Issue 12, pp.3348-3361.

  9. Jen-Wei Hsieh* and Yuan-Hung Kuan, November 2015, "DCCS: Double Circular Caching Scheme for DRAM/PRAM Hybrid Cache," IEEE Transactions on Computers (TC), Volume 64, Issue 11, pp.3115-3127.

  10. Jiantao Wang, Kam-Yiu Lam, Yuan-Hao Chang*, Jen-Wei Hsieh, and Po-Chun Huang, April 2015, "Block-based Multi-version B+-Tree for Flash-based Embedded Database Systems," IEEE Transactions on Computers (TC), Volume 64, Number 4, pp.925-940.

  11. Jen-Wei Hsieh*, Han-Yi Lin, and Dong-Lin Yang, December 2014, "Multi-Channel Architecture-based FTL for Reliable and High-Performance SSD," IEEE Transactions on Computers (TC), Volume 63, Number 12, pp.3079-3091.

  12. Kam-Yiu Lam, Chun Jiang Zhu, Yuan-Hao Chang*, Jen-Wei Hsieh, Po-Chun Huang, Chung Keung Poon, and Jiantao Wang, September 2014, "Garbage Collection of Multi-version Indexed Data on Flash Memory," Journal of Systems Architecture (JSA), Volume 60, Issue 8, pp.630-643.

  13. Jen-Wei Hsieh*, Yu-Cheng Zheng, Yung-Sheng Peng, and Po-Hung Yeh, August 2013, "VAST: Virtually Associative Sector Translation for MLC Storage Systems," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 32, Number 8, pp.1137-1150.

  14. Jen-Wei Hsieh*, Yuan-Hao Chang, and Yuan-Sheng Chu, March 2013, "Implementation Strategy for Downgraded Flash-Memory Storage Devices," ACM Transactions on Embedded Computing Systems (TECS), Volume 12, Issue 1s, Article No. 60.

  15. Jen-Wei Hsieh*, Chung-Hsien Wu, and Ge-Ming Chiu, May 2012, "MFTL: A Design and Implementation for MLC Flash Memory Storage Systems," ACM Transactions on Storage (TOS), Volume 8, Issue 2, Article No. 7.

  16. Yuan-Hao Chang, Jian-Hong Lin, Jen-Wei Hsieh, and Tei-Wei Kuo*, July 2010, "A Strategy to Emulate NOR Flash with NAND Flash," ACM Transactions on Storage (TOS), Volume 6, Issue 2, Article No. 5.

  17. Yuan-Hao Chang, Jen-Wei Hsieh, and Tei-Wei Kuo*, January 2010, "Improving Flash Wear-Leveling by Proactively Moving Static Data," IEEE Transactions on Computers (TC), Volume 59, Number 1, pp.53-65.

  18. Jen-Wei Hsieh, Yi-Lin Tsai, Tei-Wei Kuo*, and Tzao-Lin Lee, November 2008,"Configurable Flash-Memory Management: Performance Versus Overheads," IEEE Transactions on Computers (TC), Volume 57, Issue 11, pp.1571-1583.

  19. Wan-Chen Lu, Jen-Wei Hsieh, Wei-Kuan Shih*, and Tei-Wei Kuo, December 2006, "A Faster Exact Schedulability Analysis for Fixed-Priority Scheduling," The Journal of Systems and Software (JSS), Volume 79, Issue 12, pp.1744-1753.

  20. Jen-Wei Hsieh, Li-Pin Chang, and Tei-Wei Kuo*, Feb 2006, "Efficient Identification of Hot Data for Flash Memory Storage Systems," ACM Transactions on Storage (TOS), Volume 2, Issue 1, pp.22-40.

  　

• 國際會議/研討會論文

1. Yu-Hsuan Liu and Jen-Wei Hsieh, November 5-8, 2024, "IMRAID5: Design for RAID 5 with Interlaced Magnetic Recording," 2024 International Conference on Research in Adaptive and Convergent Systems (ACM RACS 2024), Pompeii, Italy.

2. Jen-Wei Hsieh and Chien-Cheng Chen, October 24-26, 2024, "CBW: Reducing Data Write Back with Circular Bubble Write for DM-SMR Disks," International Computer Symposium 2024 (ICS 2024), Taipei, Taiwan.

3. Han-Yu Liao, Yi-Shen Chen, Jen-Wei Hsieh, Yuan-Hao Chang, and Hung-Pin Chen, October 27-31, 2024, "CellRejuvo: Rescuing the Aging of 3D NAND Flash Cells with Dense-Sparse Cell Reprogramming," the 43rd IEEE/ACM International Conference on Computer-Aided Design (IEEE/ACM ICCAD 2024), New Jersey, USA.

4. Han-Yu Liao, Wen-Ling Hsu, Jen-Wei Hsieh, and Hung-Pin Chen, August 21-23, 2024, "Read Retry Mechanism for 3D NAND Flash Memory: Observations, Analyses, and Solutions," the 13th IEEE Non-Volatile Memory Systems and Applications Symposium (IEEE NVMSA 2024), Sokcho, Korea, pp.49-54.

5. Yi-Shen Chen, Ying-Jui Shih, and Jen-Wei Hsieh, October 25-28, 2023, "Mitigating Write Amplification of Dual-mode Flash Memory," 2023 20th International SoC Design Conference (ISOCC), Jeju Island, Korea.

6. Chih-Chia Chen and Jen-Wei Hsieh, Aug 23-25, 2022, Hybrid, "Nimble Mapping SSD: Leaning State Mapping Strategy to Increase Reliability of 3D TLC Charge-Trap NAND Flash Memory," the 11th IEEE Non-Volatile Memory Systems and Applications Symposium (IEEE NVMSA 2022), Taipei, Taiwan, pp.56-61.

7. Yao-Hung Huang and Jen-Wei Hsieh, Aug 18-20, 2021, Online, "Read/Write Disturbance-Aware Design for MLC STT-RAM-based Cache," the 27th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2021), Korea.

8. Cheng Ping and Jen-Wei Hsieh, March 30-April 3, 2020, "Early Eviction and Swapping for MLC STT-RAM-based LLC," the 35th ACM/SIGAPP Symposium on Applied Computing (SAC 2020), Brno, Czech Republic.

9. Nguyen-Van Hiep and Jen-Wei Hsieh, 9-12 October 2018, "Timestamp-based Hot/Cold Data Identification Scheme for Solid State Drives," ACM Research in Adaptive and Convergent Systems (RACS 2018), Honolulu, Hawaii, USA, pp.255-259.

10. David Kuang-Hui Yu and Jen-Wei Hsieh, 28-31 August 2018, "Retention-Time Relaxation Scheme for MLC Flash-Memory Storage Systems," the 24th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA2018), Hakodate, Japan, pp.42-51.

11. Jen-Wei Hsieh and Che-Jen Su, 4-8 April 2016, "Parity Management Scheme for a Hybrid-Storage RAID," the 31st ACM Symposium on Applied Computing (SAC 2016), Pisa, Italy. (The Best Poster Award Nomination: 5 out of 111 posters)

12. Han-Yi Lin and Jen-Wei Hsieh, 9-13 March 2015, "HLC: Software-Based Half-Level-Cell Flash Memory," Design, Automation & Test in Europe (DATE 2015), Grenoble, France.

13. Jen-Wei Hsieh and Ming-Xian Liu, 20-21 August 2014, "Configurable Reliability Framework for SSD-RAID," the 3rd IEEE Nonvolatile Memory Systems and Applications Symposium (NVMSA 2014), Chongqing, China.

14. Kam-Yiu Lam, Jian-Tao Wang, Yuan-Hao Chang, Po-Chun Huang, Jen-Wei Hsieh, Chung Keung Poon, and ChunJiang Zhu, 24-28 March 2014, "Garbage Collection for Multi-version Index on Flash Memory," Design, Automation & Test in Europe (DATE 2014), Dresden, Germany.

15. Jen-Wei Hsieh and Yuan-Hung Kuan, August 19, 2012, "Double Circular Caching Scheme for DRAM/PRAM Hybrid Cache," the 2nd International Workshop on Cyber-Physical Systems, Networks, and Applications (CPSNA 2012), Short Paper, Seoul, Korea.

16. Jian-Tao Wang, Kam-Yiu Lam, Yuan-Hao Chang, Jen-Wei Hsieh, Song Han, Yuang-Hung Kuan, and Al Mok, April 17-19, 2012, "Cluster-Based Multi-version B⁺-Tree in Flash-Based Embedded Database Systems," the 18th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2012), WIP, Beijing China.

17. Chun-Chieh Kuo, Jen-Wei Hsieh, and Li-Pin Chang, Aug. 28, 2011, "Detecting Solid-State Disk Geometry for Write Pattern Optimization," the 1st International Workshop on Cyber-Physical Systems, Networks, and Applications (CPSNA 2011), Toyama, Japan. (http://www.jaist.ac.jp/rtcsa2011/cpsna11/)

18. Jen-Wei Hsieh and Yu-Cheng Zheng, Aug. 7-10, 2011, "Set-Based Management Scheme for MLC Flash Memory Storage System," the 54th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2011) Special Session: System and Memory Hierarchy Design, Seoul, Korea. (http://www.mwscas2011.org/) (Invited Paper)

19. Jen-Wei Hsieh, Yuan-Hao Chang, and Wei-Li Lee, January 25-28, 2011, "An Enhanced Leakage-Aware Scheduler for Dynamically Reconfigurable FPGAs," the 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011) Special Session 7D, Yokohama, Japan. (http://www.aspdac.com/aspdac2011/index.html) (Invited Paper)

20. Jen-Wei Hsieh and Shang-Yang Chang, March 2011, "An Open-System Framework for Flash-Memory Storage System," the 26th ACM Symposium on Applied Computing (SAC 2011), TaiChung, Taiwan, pp.605-610.

21. Jen-Wei Hsieh, Chung-Hsien Wu, and Ge-Ming Chiu, August 2010, "Design and Implementation for Multi-Level Cell Flash Memory Storage Systems,"  the 16th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2010), Macau SAR, P.R.C, pp.247-252.

22. Yuan-Sheng Chu, Jen-Wei Hsieh, Yuan-Hao Chang, and Tei-Wei Kuo, April 2009, "A Set-Based Mapping Strategy for Flash-Memory Reliability Enhancement," Design, Automation & Test in Europe (DATE 2009), Nice, France, pp.405-410.

23. Po-Chun Huang, Yuan-Hao Chang, Tei-Wei Kuo, Jen-Wei Hsieh, and Miller Lin, May 2008, "The Behavior Analysis of Flash-Memory Storage Systems," the 11th IEEE International Symposium on Object/component/service-oriented Real-time distributed Computing (ISORC), Orlando, Florida, USA, pp529-534.

24. Jen-Wei Hsieh, Tei-Wei Kuo, Po-Liang Wu, and Yu-Chung Huang, August 2007, "Energy-Efficient and Performance-Enhanced Disks Using Flash-Memory Cache," Proceedings of ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED 2007), Portland, USA, pp.334-339.

25. Jian-Hong Lin, Yuan-Hao Chang, Jen-Wei Hsieh, Tei-Wei Kuo, and Cheng-Chih Yang, August 2007 "A NOR Emulation Strategy over NAND Flash Memory," the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), Daegu, Korea, pp.95-102.

26. Yuan-Hao Chang, Jen-Wei Hsieh, and Tei-Wei Kuo, June 2007, "Endurance Enhancement of Flash-Memory Storage Systems: An Efficient Static Wear Leveling Design," the 44th ACM/IEEE Design Automation Conference (DAC) (Best Paper Nomination), San Diego, USA, pp.212-217.

27. Yi-Lin Tsai, Jen-Wei Hsieh, and Tei-Wei Kuo, June 2006, "Configurable NAND Flash Translation Layer," the IEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC), Taichung, Taiwan, pp.118-127.

28. Wan-Chen Lu, Jen-Wei Hsieh, and Wei-Kuan Shih, April 2006, "A Precise Schedulability Test Algorithm for Scheduling Periodic Tasks in Real-Time Systems," the ACM Symposium on Applied Computing (SAC), Dijon, France, pp.1451-1455.

29. Tei-Wei Kuo, Jen-Wei Hsieh, Li-Pin Chang, and Yuan-Hao Chang, January 2006, "Configurability of Performance and Overheads in Flash Management," the 11th Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, pp.334-341.

30. Jen-Wei Hsieh, Li-Pin Chang, and Tei-Wei Kuo, March 2005, "Efficient On-line Identification of Hot Data for Flash-Memory Management," the ACM Symposium on Applied Computing (SAC), Santa Fe, USA, pp.838-842.

31. Nei-Chiung Perng, Neung-Tsung Tsai, Jen-Wei Hsieh, and Tei-Wei Kuo, May 2003, "The Design and Implementation of a Real-Time Data Dispatching System," the 6th IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC), Hakodate, Hokkaido, Japan, pp.285-291.

32. Chung-You Wei, Jen-Wei Hsieh, Tei-Wei Kuo, I-Hsiang Lee, Yian-Nien Wu, and Mei-Chin Tsai, Feb. 2003, "Resource Reservation and Enforcement for Framebuffer-Based Devices," the 9th International Conference on Real-Time and Embedded Computing Systems and Applications (RTCSA), Tainan, Taiwan, pp. 398-408; Lecture Notes in Computer Science (LNCS) Volume  2968, pp.398-408, (SCI; impact factor 0.402).

• 專利

1. 中華民國發明專利：謝仁偉、林翰毅，『利用快閃記憶體的壞頁來存取資料的方法』，證書號：I557559，卷號：43，期號：32，公告日期：2016/11/11，專利權法定起迄日：2016/11/21 - 2035/01/05

2. 中華民國發明專利：林建宏、張原豪、謝仁偉、郭大維、楊政智，『具有預載機制之NOR介面快閃記憶體裝置及其預載方法』，證書號：I352898，卷號：38，期號：33，公告日期：2011/11/21，專利權法定起迄日：2011/11/21 - 2027/9/3

3. 中華民國發明專利：朱原陞、謝仁偉、張原豪、郭大維、楊政智，『低隨機記憶體使用率之快閃記憶體管理方法』，證書號：I338837，卷號：38，期號：08，公告日期：2011/03/11，專利權法定起迄日：2011/03/01 - 2026/12/27

4. 中華民國發明專利：張原豪、謝仁偉、郭大維、楊政智，『快閃記憶體之高效率靜態平均抹除方法』，證書號：I331337，卷號：37，期號：28，公告日期：2010/10/01，專利權法定起迄日：2010/10/01 - 2026/12/27

5. 中華民國發明專利：謝仁偉、張立平、郭大維、謝享奇，『快閃記憶體之高效率資料特性辨識方法』，證書號：I329804，卷號：37，期號：25，公告日期：2010/09/01，專利權法定起迄日：2010/09/01 - 2025/07/28

6. 中華民國發明專利：蔡易霖、郭大維、謝仁偉、張原豪、謝享奇，『可調式快閃記憶體管理系統及方法』，證書號：I329805，卷號：37，期號：25，公告日期：2010/09/01，專利權法定起迄日：2010/09/01 - 2025/07/28

7. 中華民國發明專利：謝仁偉、吳柏良、張原豪、郭大維、楊政智，『硬碟資料讀寫快取裝置及方法』，證書號：I329860，卷號：37，期號：25，公告日期：2010/09/01，專利權法定起迄日：2010/09/01 - 2026/12/27

8. 中華民國發明專利：謝仁偉、郭大維、謝享奇，『快閃記憶體資料存取可靠性提昇方法』，證書號：I313871，卷號：36，期號：24，公告日期：2009/08/21，專利權法定起迄日：2009/08/21 - 2026/12/27

9. 中華民國新型專利：謝仁偉、郭大維、謝享奇，『快閃記憶體資料存取可靠性提昇裝置』，證書號：M304711，卷號：34，期號：02，公告日期：2007/01/11，專利權法定起迄日：2007/01/11 - 2016/04/25

10. 中華民國新型專利：謝仁偉、張立平、郭大維、謝享奇，『快閃記憶體之高效率資料特性辨識裝置』，證書號：M288401，卷號：33，期號：07，公告日期：2006/03/01，專利權法定起迄日：2006/03/01 - 2015/07/14

11. 美國專利：Yuan-Hao Chang, Jen-Wei Hsieh, Tei-Wei Kuo, and Cheng-Chih Yang, "Method for Performing Static Wear Leveling on Flash Memory," Patent No.: US 8,700,839 B2, Date Issued: April 15, 2014

12. 美國專利：Yuan-Sheng Chu, Jen-Wei Hsieh, Yuan-Hao Chang, Tei-Wei Kuo, and Cheng-Chih Yang, "Management Method for Reducing Utilization Rate of Random Access Memory (RAM) Used in Flash Memory," Patent No.: US 8,392,690 B2, Date Issued: March 5, 2013

13. 美國專利：Jen-Wei Hsieh (Taipei, TW), Tei-Wei Kuo (Taipei, TW), and Hsiang-Chi Hsieh (Sindian, TW), "Method of Facilitating Reliable Access of Flash Memory," Patent No.: US 8,010,876 B2, Date Issued: Augst 30, 2011

14. 美國專利：Jen-Wei Hsieh (Taipei, TW), Po-Liang Wu (Taipei, TW), Yuan-Hao Chang (Tainan, TW), Tei-Wei Kuo (Taipei, TW), and Cheng-Chih Yang (Taipei, TW), "Device and Method for Using a Flash Memory as a Hard Disk Cache," Patent No.: US 7,975,095 B2, Date Issued: July 5, 2011

15. 美國專利：Jen-Wei Hsieh (Taipei, TW), Tei-Wei Kuo (Taipei, TW), and Hsiang-Chi Hsieh (Sindian, TW), "Apparatus for Improving Data Access Reliability of Flash Memory," Patent No.: US 7,917,832 B2, Date Issued: March 29, 2011

16. 美國專利：Yi-Lin Tsai (Kaohsiung, TW), Tei-Wei Kuo (Taipei, TW), Jen-Wei Hsieh (Taipei, TW), Yuan-Hao Chang (Tainan, TW), and Hsiang-Chi Hsieh (Taipei, TW), "System and Method for Configuration and Management of Flash Memory," Patent No.: US 7,861,028 B2, Date Issued: Dec. 28, 2010

17. 美國專利：Jen-Wei Hsieh (Taipei, TW), Li-Pin Chang (Banciao, TW), Tei-Wei Kuo (Taipei, TW), and Hsiang-Chi Hsieh (Sindian, TW), "Method for Identifying Data Characteristics for Flash Memory," Patent No.: US 7,461,233 B2, Date Issued: Dec. 2, 2008

18. 美國專利：Yi-Lin Tsai (Kaohsiung, TW), Tei-Wei Kuo (Taipei, TW), Jen-Wei Hsieh (Taipei, TW), Yuan-Hao Chang (Tainan, TW), and Hsiang-Chi Hsieh (Taipei, TW), "System and Method for Configuration and Management of Flash Memory," Patent No.: US 7,461,198 B2, Date Issued: Dec. 2, 2008

19. 美國專利：Jen-Wei Hsieh (Taipei, TW), Li-Pin Chang (Banciao, TW), Tei-Wei Kuo (Taipei, TW), and Hsiang-Chi Hsieh (Sindian, TW), "Device for Identifying Data Characteristics for Flash Memory," Patent No.: US 7,447,870 B2, Date Issued: Nov. 4, 2008

20. 中華人民共和國發明專利：吳柏良、謝仁偉、張原豪、郭大維、楊政智，『硬盤資料讀寫快取裝置及方法』，September 2008: CN 200710079567.2

21. 中華人民共和國發明專利：謝仁偉、郭大維、謝享奇，『提高閃存資料存取可靠性的方法』，September 2008: CN 200710079568.7

22. 中華人民共和國發明專利：謝仁偉、張原豪、郭大維、楊政智，『閃存的高效率靜態平均抹除方法』，September 2008: CN 200710079569.1

23. 中華人民共和國實用新型專利：謝仁偉、郭大維、謝享奇，『閃存資料存取可靠性提昇裝置』，July 2007: CN 200620115768.4

• 國際會議/研討會重要職務

1. Local Arrangement Chair of ESWEEK 2025, Taipei, Taiwan.

2. Local Organization Team, the 44th IEEE Real-Time Systems Symposium (RTSS 2023), December 5-8, 2023, Taipei, Taiwan.

3. General Chair, the 11th IEEE Non-Volatile Memory Systems and Applications Symposium (IEEE NVMSA 2022), August 23-25, 2022, Taipei, Taiwan.

4. Local Arrangement Chair, the 2018 International Symposium on Parallel Architectures, Algorithms and Programming (PAAP’18), December 26-28, 2018, Taipei, Taiwan.

5. Session Chair (Session 4: Support for Predictability), the 24th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (IEEE RTCSA 2018), August 28-31, 2018, Hakodate, Japan.

6. Guest Editor, ACM Transactions on Cyber-Physical Systems (TCPS), Special Issue on Real-Time aspects in Cyber-Physical Systems, 2017.

7. Guest Editor, Journal of System Architecture (JSA), Special Issue on Real-Time Embedded Systems Design and Analysis, 2017.

8. Guest Editor, IEEE Access, Special Section on System-Level Design Automation Methods for Multi-Processor System-on-Chips.

9. Associate Editor, IET Cyber-Physical Systems: Theory & Applications (22 June 2016 - 31 December 2018).

10. Program Co-Chair (Embedded Systems Track), the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (IEEE RTCSA 2017), Hsinchu, Taiwan.

11. Local Arrangement Chair, the 18th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT’17), December 18-20, 2017, Taipei, Taiwan.

12. Session Chair (EMBS2), 31st ACM Symposium on Applied Computing (SAC 2016), April 4-8, 2016, Pisa, Italy.

13. Local Arrangement Chair, the 10th International Conference on Intelligent Systems and Knowledge Engineering (ISKE 2015), November 24-27, 2015, Taipei, Taiwan.

14. Session Chair, Taiwan Academic Network Conference (TANET 2014), October 22-24, 2014, Kaohsiung, Taiwan.

15. Publicity Chair, the 5th FTRA International Conference on Creative Converged IT (CCIT 2014), April 9-12, 2014, Daejeon, Korea.

16. Local Arrangement Chair, the 14th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT'13), December 16-18, 2013, Taipei, Taiwan.

17. Publicity Co-Chair, the 4th International Conference on Mobile, Ubiquitous, and Intelligent Computing (MUSIC-13), September 4-6, 2013, Gwangju, Korea.

18. Financial Chair, the 19th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (IEEE RTCSA 2013), Taipei, Taiwan.

19. Local Arrangement Chair, the 2012 IEEE International Symposium on Parallel Architectures, Algorithms and Programming (PAAP’12), December 17-20, 2012, Taipei, Taiwan.

20. Local Arrangement Chair, the 2012 IEEE International Symposium on Biometrics and Security Technologies (ISBAST'12), March 26-29, 2012, Taipei, Taiwan.

21. Session Chair (Session 10 Architecture and Practice I), the 16th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (IEEE RTCSA 2010), Aug 23-25, 2010, Macau SAR, P.R.C.

22. General Chair, International Workshop on Software Support for Portable Storage (IWSSPS 2010), October 28, 2010, Scottsdale, Arizona, U.S.A.

23. Publicity Co-Chair, the 9th IEEE International Symposium on Parallel and Distributed Processing with Applications (IEEE ISPA11), May 26-28, 2011, Busan, Korea.

24. Local Arrangement Chair, the 8th IEEE International Symposium on Parallel and Distributed Processing with Applications (IEEE ISPA10), Sept 6-9, Taipei, Taiwan.

25. Workshops Chair, the 8th IEEE International Symposium on Parallel and Distributed Processing with Applications (IEEE ISPA10), Sept 6-9, Taipei, Taiwan.

26. Program Chair, International Workshop on Software Support for Portable Storage (IWSSPS 2009), Oct 15, 2009, Grenoble, France.

27. Session Chair (Session 8: Real-Time Operating Systems), the 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (IEEE RTCSA 2008), Aug 25-27, 2008, Kaohsiung, Taiwan.

28. Publication Chair, the 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (IEEE RTCSA 2008), Aug 25-27, 2008, Kaohsiung, Taiwan.

29. Registration Co-Chair, the 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (IEEE RTCSA 2008), Aug 25-27, 2008, Kaohsiung, Taiwan.

• 榮譽

1. Invited Talk, International Workshop on Memory and Storage Computing (MSC) @ ESWEEK 2024, Raleigh, North Carolina, USA, 3 Oct. 2024.

2. 獲選112學年度優良輔導老師

3. 指導碩士班學生許文齡畢業論文『Read Retry Mechanism for 3D NAND Flash Memory: Observations, Analysis, and Solutions』榮獲2022台灣資訊儲存技術協會 (TISA) 碩士班論文獎 (https://www.tisa-tw.org.tw/awards_detail/38.htm)

4. 110學年度榮獲臺灣科技大學教師教學優良獎

5. Invited Speaker at the Asia Pacific Society for Computing and Information Technology 2018 Annual Meeting (APSCIT 2018 Annual Meeting), Hokkaido, Japan, 19-22 July 2018.

6. Keynote Speaker at the 2018 International Conference for Leading and Young Computer Scientists (IC-LYCS 2018), Okinawa, Japan, 9-12 Feb. 2018.

7. 與蘇順豐老師、李佳穎老師共同指導創意設計學士班余安婷同學、林雨蓁同學、電機工程系陳弘明同學，及交換生饒樂天同學榮獲教育部104年度智慧電子應用設計聯盟中心舉辦之『智慧電子美學設計展』活動『銀獎』(2015/12/23)。

8. 與項天瑞老師、陳詩捷老師、李佳穎老師共同指導工商業設計系朱彥樺同學、羅梓萍同學及資訊工程系程俊瑋同學榮獲教育部104年度智慧電子應用設計聯盟中心舉辦之『智慧電子美學設計展』活動『佳作』(2015/12/23)。

9. 獲 IEEE 資深會員 (2015/9/30)

10. 榮獲科技部104年度優秀年輕學者三年期研究計畫獎勵

11. 103學年度榮獲臺灣科技大學教學傑出獎 (1%教師)

12. 與項天瑞老師、陳詩捷老師、李佳穎老師共同指導工商業設計系黃冠霖同學、何立芹同學及資訊工程系陳亞德同學榮獲教育部103年度智慧電子應用設計聯盟中心舉辦之『智慧電子美學展』活動『佳作』。

13. 與項天瑞老師、陳詩捷老師、李佳穎老師共同指導工商業設計系黃冠霖同學、何立芹同學及資訊工程系陳亞德同學榮獲教育部103-104年度智慧電子跨領域應用專題系列課程計畫之應用設計領域競賽-學生專題作品組『佳作』。

14. 2014年擔任『國際資訊奧林匹亞參賽團』副領隊

15. 『多核心雲端計算平台課程設計』(張榮貴、楊武、楊朝棟、劉邦鋒、謝仁偉、朱志平)榮獲教育部資訊及科技教育司網路通訊人才培育先導型計畫優良教材獎『特優』(2013/12/30)

16. 2013年擔任『國際資訊奧林匹亞參賽團』副領隊

17. 指導碩士班學生管元弘畢業論文『DRAM/PRAM混合記憶體之快取管理機制』榮獲2012中華民國資訊學會 (IICM)『資訊學會碩博士最佳論文獎』佳作 (http://www.iicm.org.tw/award/paper2012.asp)

18. 指導碩士班學生管元弘畢業論文『Double Circular Caching Scheme for DRAM/PRAM Hybrid Cache』榮獲2012台灣資訊儲存技術協會 (TISA) 台灣資訊學生論文獎 (http://www.tisa-tw.org.tw/award_list.asp)

19. 指導碩士班學生陳崇瑋畢業論文『Adaptive ECC Scheme for SLC/MLC Hybrids SSDs』榮獲2012台灣資訊儲存技術協會 (TISA) 台灣資訊學生論文獎 (http://www.tisa-tw.org.tw/award_list.asp)

20. 榮獲國科會101年度優秀年輕學者三年期研究計畫獎勵

21. 2012年獲邀在『前瞻儲存技術與應用論壇』演講 (http://www.digitimes.com.tw/seminar/DTF_20120809/index.asp)

22. 2011年獲邀在第54屆IEEE International Midwest Symposium on Circuits and Systems（IEEE MWSCAS 2011，韓國首爾）發表特邀論文 (invited paper).

23. 2011年獲邀在Asia and South Pacific Design Automation Conference（ASP-DAC 2011，日本橫濱）發表特邀論文 (invited paper).

24. 2010年獲邀在International Symposium on Optical Memory（ISOM 2010）演講

25. 2006年獲頒中華民國斐陶斐榮譽學會榮譽會員

最近更新日期：2024/10/24